1. Field of the Invention
The present invention relates to a computer for decreasing noise and a control method and medium for decreasing the noise thereof, and more particularly, to a computer capable of decreasing noise generated when an operation mode of a central processing unit (CPU) is switched, and to a control method and medium thereof.
2. Description of the Related Art
Advanced Configuration and Power Interface (ACPI) is an open industry specification applicable to computer hardware, operating systems, software and peripheral interfaces. This specification was co-developed by Intel®, Microsoft®, Toshiba®, etc., supporting mutual communication associated with use of power for operating system, hardware and peripherals.
A conventional power management system of a computer is based on Basic Input/Output System (BIOS). Thus, power supplied to devices could be stopped after a predetermined period of time for inactivating devices has elapsed. However, since the ACPI enables an operating system supporting Operating System Directed Power Management (OSPM) to manage all the activities associated with power supply, power can be supplied to devices only when necessary.
The ACPI published in 1996 defines operation modes associated with power states of the CPU as C0, C1, C2 and C3. C0 is defined as a normal state, C1 as a halt state, C2 as a stop-grant state and C3 as a stop clock state.
Under C2, the CPU performs activities consuming a low amount of power, such as a snooping operation so as to maintain a cache coherence. Under C3 defined as a deep sleep mode, an external clock is not provided to the CPU, and thus, all the activities of the processor, except for a function to maintain data stored in a cache memory within the CPU, are stopped. Accordingly, power consumption under the deep sleep mode C3 is much lower than under C2.
Intel®Corporation has developed Intel® Mobile Voltage Positioning II (IMVP II), an advanced technique for regulating voltages, in which C4 defined as a deeper sleep mode is added as a new power state of the CPU. Under C4, the voltage level of the power supplied to the CPU is considerably lower than when the CPU is not in operation, thereby minimizing power consumption.
FIG. 1 is a diagram illustrating a conventional power supply system of a CPU in a computer.
Referring to FIG. 1, a CPU power supply 130 converts power supplied from an adaptor or a battery into a driving power required for driving the CPU 110, e.g., a core voltage (Vcore), and the CPU power supply 130 supplies driving power to the CPU 110.
The CPU power supply 130 supplies the CPU with a core voltage of the level corresponding to an operation mode signal relative to an operation mode of the CPU 110 supplied from a chipset such as an input/output control hub, namely a mode signal output unit 120. For example, where an operation mode signal corresponding to a deeper sleep mode C4 is received, the CPU power supply 130 supplies the CPU with a core voltage of the level lower (e.g., 0.85V) than the core voltage level (e.g., 1.05V to 1.15V) at the normal state.
Generally, the CPU power supply 130 is constructed with a plurality of electric devices. By way of example, an output side of the CPU power supply 130 comprises a resonant circuit unit formed with multiple capacitors and inductors, and a ceramic condenser.
However, as in the conventional computer, when power management is done according to an operation mode of the CPU, a change in voltage level of the driving power outputted from the CPU power supply due to a switching of the operation mode of the CPU has caused a fluctuation in the output current. This fluctuation in the output current has caused resonant noise from the resonant circuit unit and oscillation noise from the ceramic condenser to be generated.